There are downsides, of course. One is that you’re now in cycle-counting hell if you want your I/Os to flip at a well-determined time. Another is that simply wiring the cores to I/O registers with load/store instructions means you have four cores contending for a bank of GPIO registers, which can lead to lots of non-determinism, wait states, and other complexities. Thus, one can not merely stick four PicoRV32 cores onto an AXI bus and bit-bang GPIOs and expect a PIO-like outcome.
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The pre-season favourites had done their level best to play down their expected advantage in the buildup to the Australian Grand Prix, but it was impossible to hide. A dominant one-two by the best part of a second for George Russell and Kimi Antonelli in qualifying was followed by a similarly assured one-two finish in the race.